Bio.: Don Chan is the Vice President of R&D at Cadence. He leads a global team responsible for advanced nodes development and support of the leading foundry in the world.
Don joined Cadence in Nov 2018. Prior to his current role, he held several leadership positions at Synopsys since 1993 where he led a global organization of Applications and R&D engineers responsible for providing RTL-GDS solutions for advanced IC Design. Don also teaches logic design classes at SCU in Silicon Valley. He began his engineering career at Spectrum Software in 1986 and joined Fujitsu Microelectronics in 1988 as an ASIC Design Engineer.

Bio.: Luca Benini is a Full Professor of Electronics at the University of Bologna. He also holds a faculty position at the Swiss Federal Institute of Technology, Zurich (ETHZ). In 2009-2012 he has served as Chief Architect in STMicroelectronics for the Platform 2012 project. He received a Ph.D. degree in electrical engineering from Stanford University in 1997.
Dr. Benini has published more than 800 papers in peer-reviewed international journals and conferences, five books and several book chapters. He has been general chair and program chair of the Design Automation and Test in Europe Conference. He has been a member of the technical program committee and organizing committee of several conferences, including the Design Automation Conference, International Symposium on Low Power Design, the Symposium on Hardware-Software Codesign.
He is Associate Editor of the IEEE Transactions on Computer Aided Design of Circuits and Systems and of the ACM Transactions on Embedded Computing Systems .
He is a Fellow of the IEEE, of the ACM and a member of the Academia Europaea.

Bio.: Jim Culp is a Fellow at GLOBALFOUNDRIES, where he leads the CAD and Design Methodology teams within the Design Enablement and Design Platforms organization. With over 30 years of experience in the semiconductor industry, Jim is recognized for his deep technical expertise and leadership in advanced design enablement. Before joining GLOBALFOUNDRIES, Jim held senior positions at IBM, where he contributed significantly to physical design and technology integration. Culp’s current work focuses on deploying 3Di design kits for RF/AMS applications, which are critical for next-generation consumer electronics and aerospace & defense systems. His technical interests and contributions span parametric yield modeling, DTCO/STCO application development, and AI-based design methodologies. He was an IBM Master Inventor, a recipient of the Si2 Distinguished Service Award, and has been recently appointed to the Board of Directors of the Silicon Integration Initiative (Si2), where he contributes to industry-wide efforts in design standardization and enablement.

Bio.: Massimo Alioto received the Laurea (MSc) degree in Electronics Engineering and the Ph.D. degree in Electrical Engineering from the University of Catania (Italy) in 1997 and 2001, respectively. He is a Professor at the Department of Electrical and Computer Engineering, National University of Singapore where he leads the Green IC group, and is the Director of the Integrated Circuits and Embedded Systems area and the FD-FAbrICS industry-sponsored lab. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan Ann Arbor (2011-2012), BWRC – University of California, Berkeley (2009-2011), and EPFL (Switzerland, 2007).
He has authored or co-authored more than 350 publications on journals and conference proceedings. He is co-author of five books, In-Memory and Immersed-in-Logic Primitives for Ubiquitous Hardware Security (Springer, 2023), Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling (Springer, 2020), Enabling the Internet of Things – from Circuits to Systems (Springer, 2017), Flip-Flop Design in Nanometer CMOS – from High Speed to Low Energy (Springer, 2015) and Model and Design of Bipolar and MOS Current-Mode Logic: CML, ECL and SCL Digital Circuits (Springer, 2005). His primary research interests include widely energy-scalable integrated systems, self-powered wireless integrated systems, near-threshold circuits for green computing, data-driven integrated systems, hardware security, and emerging technologies, among the others.
He was the Editor in Chief of the IEEE Transactions on VLSI Systems (2019-2022), and the Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2018). He is the Chair of the Distinguished Lecturer Program for the IEEE Circuits and Systems Society (2023-2024), and was Distinguished Lecturer for the same Society (2022-2023, 2009-2010) and the Solid-State Circuits Society (2020-2021). He was also member of the Board of Governors of the IEEE Circuits and Systems Society (2015-2020), and Chair of the “VLSI Systems and Applications” Technical Committee (2010-2012). In the last five years, he has given 50+ invited talks in top conferences, universities and leading semiconductor companies. His research has received various best paper awards (e.g., ISSCC, ICECS), public recognition from industry (e.g., among 10 technology highlights from TSMC in 2020), and his group has been recognized as top contributor at the VLSI Symposium on Circuits (2023). He served as Guest Editor of several IEEE journal special issues (e.g., JSSC, TCAS-I, TCAS-II, JETCAS). He also serves or has served as Associate Editor of a number of IEEE and ACM journals. He is/was Technical Program Chair (e.g., ISCAS, SOCC, ICECS, NEWCAS, APCCAS), Track Chair in a number of conferences (ICCD, ISCAS, ICECS, VLSI-SoC, APCCAS, ICM), ISSCC and ASSCC subcommittee member. Prof. Alioto is an IEEE Fellow.

Bio.: Prof. Yeo is a Visiting Professor in the School of EEE at NTU, a Member of Board of Advisors of the Singapore Semiconductor Industry Association, a Council Member of the Assembly & Test WSQ Framework Industry Skills and Training of the Singapore Workforce Development Agency, a Member of the Engineering Science (ES) Advisory Committee of Ngee Ann Polytechnic and a Member of Hwa Chong Institutional IP Advisory Board.
Prof. Yeo is a world-renowned authority on low-power RF/mm-wave IC design and a recognized expert in CMOS technology. He has secured over S$30 million of research funding from various funding agencies and the industry in the last 3 years. He is the author of 6 books and 5 book chapters. The 6 books are: Intellectual Property for Integrated Circuits (J. Ross Publishing (USA), 2010), Design of CMOS RF Integrated Circuits and Systems (World Scientific Publishing, 2010), Low-Voltage, Low-Power VLSI Subsystems (McGraw-Hill, New York, 2005), Low-Voltage Low-Power Digital BiCMOS Circuits: Circuit Design, Comparative Study, and Sensitivity Analysis (Prentice Hall, 2000) and CMOS/BiCMOS ULSI: Low-Voltage, Low-Power (Prentice Hall, 2002). The latter was translated to Chinese version and became an ever popular foreign textbook in China. In addition, he has published over 500 international top-tier refereed journal and conference papers in his area of research and holds 35 patents, including 2 patents for the world’s smallest integrated transformer, a patent for the world’s smallest integrated filter for 60GHz standard, the inventor of several high Q-factor RF spiral inductors and co-inventor of quite a few novel circuit techniques for RF/mm-wave IC applications.