Count Down to ISEDA 2024

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Welcome to ISEDA 2024

Sponsored by IEEE and ACM, and jointly organized by EDA² and the EDA Committee of CIE, the ISEDA (International Symposium of EDA) is an annual premier forum dedicated to VLSI design automation. The symposium aims at exploring the new challenges, presenting leading-edge technologies and providing EDA community with opportunities of predicting future directions in EDA research areas. ISEDA covers the full range of EDA topics from device and circuit levels up to system level, from analog to digital designs as well as manufacturing. The format of meeting intends to cultivate productive and novel interchangeable ideas among EDA researcher and developers. Academic and industrial EDA related professionals who are interested in EDA's theoretical and practical research are all welcomed to contribute to ISEDA.

Keynote Speakers

More speakers will be updated soon...

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Jamal Deen

McMaster University

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David Atienza Alonso

Embedded Systems Laboratory, EPFL

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Mehdi B. Tahoori

Karlsruhe Institute of Technology

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Xiaoqing Wen

Kyushu Institute of Technology

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John Kim

Korea Advanced Institute of Science and Technology

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Sreejit Chakravarty

Ampere Computing

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Christopher Thomas

Integrated Insights

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Elyse Rosenbaum

University of Illinois

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Jacky Ni

Advanced Manufacturing EDA Co., Ltd.

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Sa Zhao

Semitronix Corporation

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Han Yu

Empyrean Technology

About the Tutorials

Hans-Joachim Wunderlich

Professor Emeritus at the University of Stuttgart


Test and Health Monitoring under Approximations and Variations

Bio: Hans-Joachim Wunderlich is Professor Emeritus of the University Stuttgart and a Life Fellow of IEEE. He received the diploma degree in mathematics from the University of Freiburg, Germany, in 1981 and the Dr. rer. nat. (Ph.D. degree) from the University of Karlsruhe in 1986. Since 1991, he has been a full professor. From 2002 to 2018, he was the director of the Institute of Computer Architecture and Computer Engineering at the University of Stuttgart, Germany. He has been associate editor of various international journals and organizer of a variety of IEEE conferences on design, test and fault tolerance of electronic systems. He has published 15 books and book chapters and around 300 reviewed scientific papers in journals and conferences. His research interests include test, reliability, fault tolerance and design automation of microelectronic systems.

More tutorials will be updated soon.

Important News


08Feb. 2024

Submission Deadline Extension Notice

Happy Chinese New Year! In line with the author's request, the submission deadline for ISEDA 2024 has been extended to February 28, 2024. We eagerly anticipate and warmly welcome your submission. Submit Paper Now!

29Dec. 2023

Server Maintenance Notification (Done)

Our server of website and paper submission system will be under maintenance, which will start from 19:30 on December 29, 2023, to 19:30 on December 31, 2023 (estimated). Thanks for your kindly understanding in advance. (Maintenance Done) Click to enter Submission System!

Call for Papers

Original papers in, but not limited to, the following areas are invited:

  • 1.1 Device Compact Modeling
  • 1.2 Process Design Kit
  • 1.3 Semiconductor Process & Device Simulation
  • 1.4 Cell Library Design, Characterization and Verification
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Technology & Model

  • 2.1 Schematic & Layout Design
  • 2.2 Circuit Simulation
  • 2.3 On-chip & Packaging Electromagnetic Field Simulation
  • 2.4 Radio-Frequency & Photoelectric Compound Circuit Simulation
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Analog Circuit

  • 3.1 Digital Simulation / Emulation
  • 3.2 High-Level Synthesis
  • 3.3 Logic Synthesis
  • 3.4 Formal Verification
  • 3.5 Constructing Hardware in Scala Embedded Language
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Digital Design & Verification

  • 4.1 Design-For-Test, Design-For-Reliability, Design-For-Manufacturability
  • 4.2 Placement & Routing
  • 4.3 Parasitic Extraction
  • 4.4 Timing Analysis
  • 4.5 Physical Verification
  • 4.6 Electromigration & IR drop
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Physical Implementation

  • 5.1 Computational Lithography
  • 5.2 Masking Manufacturing
  • 5.3 Yield & Defect Analysis
  • 5.4 Process Modeling and Emulation
  • 5.5 Metrology and Silicon Data Processing
  • 5.6 APC (Automatic Process Control) Technology
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Wafer Manufacturing

  • 6.1 Packaging Design
  • 6.2 Chip Level Thermal Simulation
  • 6.3 Packaging Stress Analysis
  • 6.4 Multi-Physics Simulation
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Packaging & Multi-Physics

  • 7.1 Artificial Intelligence for EDA
  • 7.2 Cloud / Parallel Computing for EDA
  • 7.3 Heterogeneous Computing for EDA




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Emerging Technologies

  • 8.1 Open Source EDA
  • 8.2 EDA Database
  • 8.3 EDA Standardization


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Miscellaneous

Important Dates

Original papers in, but not limited to, the following areas are invited:

  • Deadline for Regular Paper Submission:

    February 10, 2024

    February 28, 2024 (Extended)
  • Notification of Acceptance:

    March 06, 2024

    March 25, 2024 (Extended)
  • Deadline for Final Version:

    March 31, 2024

    April 10, 2024 (Extended)
  • Deadline for Invited Talks, Extended Abstracts, Tutorials, Special Sessions, Industry Sessions:
    March 15, 2024

Publication Information

The accepted papers passed through the peer-reviewed process after proper registration and presentation will be included in the ISEDA 2024 Conference Proceedings, which will be submitted for inclusion in the IEEE Xplore Digital Library, and submitted for indexing by EI compendex and Scopus.

  • IEEE/CEDA, ACM/SIGDA

  • Department of Information Science, National Natural Science Foundation of China (NSFC)

  • Chinese Institute of Electronics (CIE)

  • Steering Committee, Major Plan of "Fundamental Research on Post-Moore Novel Devices"
  • EDA Ecosystem Development Accelerator (EDA²)

  • EDA Committee of CIE
Xidian University
Peking University
Southeast University
Tsinghua University
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